SEARCH
0-9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
Prev | Current Page 163 | Next

Jan Axelson

"Serial Port Complete: COM Ports, USB Virtual COM Ports, and Ports for Embedded Systems"

5
which is within the -7V limit.
3$  

-
 /
 7
Understanding the reason for the common-mode voltage limit requires looking
inside the chips. Figure 7-13 shows the internal circuits for a portion of a
two-way, half-duplex link. The components are as presented in National Semiconductor??™s
application note AN-409. A wire connects the outputs of the two
drivers. The receivers, termination, and the rest of the drivers??™ circuits aren??™t
shown, and a complete link would include a similar circuit for the other wire in
the differential pair.
A second wire connects the grounds of the two nodes. Each driver has a parasitic
diode connection (D3 and D4) between the chip??™s grounded substrate
(base material) and the collector of the output transistor. The parasitic diode is
a result of the physics of the semiconductor material that makes up the chip.
The chip??™s ground pin also connects to the substrate.
Schottky diodes D1 and D2 prevent damaging substrate currents from flowing
when one of the drivers is on and the other is off. For example, if driver Y??™s
ground potential is 5V less than driver Z??™s, if D1 and D2 are replaced by direct
connections, current could flow in a loop through D4, Q1, and back to D4.
Series resistors in the ground wire would limit the current, but driver Y??™s output
voltage would clamp at -0.7V due to the voltage drop across D4.


Pages:
151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175